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%s N/A %d %.*s
%*s unset cpu_type '%s' is not valid
%s:%lu:%lu:1:1
Using timer interrupt.
No events given.
No such event found.
%d
Too many arguments.
%d %s
No such event "%s"
Group %u : : (counter: all %d , (ext: %s) )
(min count: %d) zero Unit masks (default 0x%x)
----------
0x%.2x: use the given CPU type check-events unit-mask get-cpu-type get-default-event get the default event callgraph use this callgraph depth show version xml list events as XML Help options: Invalid unit mask %x for event %s
No event named %s is available.
Invalid unit mask 0x%x for event %s
Count %d for event %s is below the minimum %d
Not enough hardware counters. Need %lu counters but only has %lu.
Couldn't allocate hardware counters for the selected events.
you should upgrade oprofile or force the use of timer mode
More than one event specified.
See BIOS and Kernel Developer's Guide for AMD Athlon and AMD Opteron Processors
(26094.pdf), Section 10.2
See BIOS and Kernel Developer's Guide for AMD Family 10h Processors
(31116.pdf), Section 3.14
See BIOS and Kernel Developer's Guide for AMD Family 11h Processors
(41256.pdf), Section 3.14
See AMD Athlon Processor x86 Code Optimization Guide
(22007.pdf), Appendix D
See Intel Architecture Developer's Manual Volume 3B, Appendix A and
Intel Architecture Optimization Reference Manual (730795-001)
See Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3B (Document 253669) Chapter 18 for architectural perfmon events
This is a limited set of fallback events because oprofile doesn't know your CPU
See Intel Itanium Processor Reference Manual
for Software Development (Document 245320-003),
Intel Itanium Processor Reference Manual
for Software Optimization (Document 245473-003),
Intel Itanium 2 Processor Reference Manual
for Software Development and Optimization (Document 251110-001)
See Alpha Architecture Reference Manual
http://download.majix.org/dec/alpha_arch_ref.pdf
See Intel XScale Core Developer's Manual
Chapter 8 Performance Monitoring
See ARM11 MPCore Processor Technical Reference Manual r1p0
Page 3-70, performance counters
See ARM11 Technical Reference Manual
See ARM11 Technical Reference Manual
Cortex A8 DDI (ARM DDI 0344B, revision r1p1)
See PA6T Power Implementation Features Book IV
Chapter 7 Performance Counters
Obtain PowerPC64 processor documentation at:
http://www-306.ibm.com/chips/techlib/techlib.nsf/productfamilies/PowerPC
Obtain Cell Broadband Engine documentation at:
http://www-306.ibm.com/chips/techlib/techlib.nsf/products/Cell_Broadband_Engine
See Programming the MIPS64 20Kc Processor Core User's manual available from www.mips.com
See Programming the MIPS32 24K Core available from www.mips.com
See Programming the MIPS64 25Kf Processor Core User's manual available from www.mips.com
See Programming the MIPS32 34K Core Family available from www.mips.com
See Programming the MIPS64 5K Processor Core Family Software User's manual available from www.mips.com
See NEC R10000 / R12000 User's Manual
http://www.necelam.com/docs/files/U10278EJ3V0UM00.pdf
See RM7000 Family User Manual available from www.pmc-sierra.com
See RM9000x2 Family User Manual available from www.pmc-sierra.com
See NEC VR5443 User's Manual, Volume 1
http://www.necelam.com/docs/files/1375_V1.pdf
See NEC R10000 / R12000 User's Manual
http://www.necel.com/nesdis/image/U16677EJ3V0UM00.pdf
See PowerPC e500 Core Complex Reference Manual
Chapter 7: Performance Monitor
Downloadable from http://www.freescale.com
See PowerPC e300 Core Reference Manual
Downloadable from http://www.freescale.com
See MPC7450 RISC Microprocessor Family Reference Manual
Chapter 11: Performance Monitor
Downloadable from http://www.freescale.com
See AVR32 Architecture Manual
Chapter 6: Performance Counters
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
%d is not a valid processor type.
oprofile: available events for CPU type "%s"
check the given event descriptions for validity default unit mask for the given event show the auto-detected CPU type [̜̜̜̜̜֜||rh^^TJJ@6,"CPU_CLK_UNHALTED RTC_INTERRUPTS GLOBAL_POWER_EVENTS CPU_CYCLES INSTRUCTIONS INSTRUCTIONS_GRADUATED INSTRUCTIONS_ISSUED INSN_SURVIVED_STAGE7 INSTRUCTIONS_EXECUTED CPU_CLK OPROFILE_EVENTS_DIR /usr/share/oprofile/ %s/%s/%s 0x%x 0X%x expected hexadecimal value expected decimal value parse_um() expected :value include include must be on its own duplicate name: tag duplicate type: tag mandatory bitmask exclusive invalid unit mask type default duplicate default: tag invalid unit mask tag Missing name for unit mask Missing type for unit mask no unit mask name line invalid unit mask entry unit_masks next_token() expected ':' desc invalid event name duplicate event: tag counters duplicate counters: tag cpuid ext duplicate ext: tag duplicate um: tag Empty unit mask minimum duplicate minimum: tag filter tags before include: non whitespace after include: unknown tag GenuineIntel um %s is not used
duplicate event tag mmcr0 duplicate mmcr0 tag mmcr1 duplicate mmcr1: tag %Lx mmcra duplicate mmcra: tag mmcr0:%u mmcr1:%Lu mmcra:%u 8888@ 8 800 PPXXh``8 8 8 00 0088 88888888888888888888888888888888888888oprofile: parse error in %s, line %u
oprofile: could not open unit mask description file %s
oprofile: maximum unit mask entries exceeded oprofile: could not find unit mask %s
next_token(): garbage at end of line oprofile: could not open event description file %s
combined unit mask must be all the same types combined unit mask must be all bitmasks or exclusive too many members in combined unit mask mandatory um %s doesn't contain exactly one entry (%s)
um %s default mask is not valid (%s)
exclusive um %s default value is not valid (%s)
oprofile: could not open event mapping file %s
expected long hexadecimal value Error: Missing information in line %d of event mapping file %s
Invalid event part %s
Invalid event %s
Invalid count for event %s
Too many events specified: CPU only has %lu counters.
invalid cpu type /dev/oprofile/cpu_type Could not read cpu type.
Pentium Pro i386/ppro PII i386/pii PIII i386/piii Athlon i386/athlon CPU with timer interrupt timer CPU with RTC device rtc P4 / Xeon i386/p4 IA64 ia64/ia64 Itanium ia64/itanium Itanium 2 ia64/itanium2 AMD64 processors x86-64/hammer i386/p4-ht Alpha EV4 alpha/ev4 Alpha EV5 alpha/ev5 Alpha PCA56 alpha/pca56 Alpha EV6 alpha/ev6 Alpha EV67 alpha/ev67 Pentium M (P6 core) i386/p6_mobile ARM/XScale PMU1 arm/xscale1 ARM/XScale PMU2 arm/xscale2 ppc64 POWER4 ppc64/power4 ppc64 POWER5 ppc64/power5 ppc64 POWER5+ ppc64/power5+ ppc64 970 ppc64/970 MIPS 20K mips/20K MIPS 24K mips/24K MIPS 25K mips/25K MIPS 34K mips/34K MIPS 5K mips/5K MIPS R10000 mips/r10000 MIPS R12000 mips/r12000 QED RM7000 mips/rm7000 PMC-Sierra RM9000 mips/rm9000 Sibyte SB1 mips/sb1 NEC VR5432 mips/vr5432 NEC VR5500 mips/vr5500 ppc/e500 ppc/e500v2 Core Solo / Duo i386/core PowerPC G4 ppc/7450 Core 2 i386/core_2 ppc64 POWER6 ppc64/power6 ppc64 970MP ppc64/970MP ppc64 Cell Broadband Engine ppc64/cell-be AMD64 family10 x86-64/family10 ppc64 PA6T ppc64/pa6t ARM MPCore arm/mpcore ARM V6 PMU arm/armv6 ppc64 POWER5++ ppc64/power5++ ppc/e300 AVR32 avr32 ARM V7 PMNC arm/armv7 Intel Architectural Perfmon i386/arch_perfmon AMD64 family11h x86-64/family11h ppc64 POWER7 ppc64/power7 ppc64 compat version 1 ppc64/ibm-compat-v1 Intel Core/i7 i386/core_i7 Intel Atom i386/atom /proc/sys/dev/oprofile/cpu_type Unable to open cpu_type file for reading
Make sure you have done opcontrol --init
P4 / Xeon with 2 hyper-threads # ,1 ;B Ng m
%1 =G Q\ g{ &/ 8A JS \e nv ~ ! " # )%$ 2.% 9I& S^' gn( z) * + , - . !,/ 6E0 XT1 ]c2 iu3 4 5 6 7 !8 .99 /dev/oprofile 1.0 quote_str: buffer overflow %d
Warning: init_xml_str_attr: buffer overflow %d
init_xml_str_attr: snprintf failed
Warning: init_xml_dbl_attr: buffer overflow %d
init_xml_dbl_attr: snprintf failed
Warning: init_xml_int_attr: buffer overflow %d
init_xml_int_attr: snprintf failed
Warning: close_xml_element: buffer overflow %d
close_xml_element: snprintf failed
Warning: open_xml_element: buffer overflow %d
open_xml_element: snprintf failed
%s=%s %s="%.2f" %s="%d" /> </%s>
<%s%s NONE processor cputype title schemaversion mhz timersetup rtcinterrupts eventsetup eventname unitmask setupcount separatedcpus options session debuginfo excludedependent excludesymbols imagepath includesymbols merge classes class cpu process pid thread tid binary module callers callees symbol idref self detaillo detailhi symboltable symboldata startingaddr codelength summarydata sampledata detailtable symboldetails detaildata vmaoffset bytestable bytes help_events header doc event_name group counter_mask min_count unit_mask oprofiled:op_close_file: op_read_int_from_file: Failed to open %s, reason %s
op_read_int_from_file: Failed to convert contents of file %s to integer
oprofiled:op_do_open_file: %s: %s oprofiled:op_write_file: wrote less than expected: %lu bytes.
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